A max Temperature range:? The parts operate from a single 2. The parts contain an 8-channel multiplexer and track-and-hold amplifier that can handle input frequencies up to 11 MHz. The conversion process can be controlled using the CONVST pin, by a command mode where conversions occur across I2C write operations or an automatic conversion interval mode selected through software control. This allows the widest dynamic input range to the ADC. On-chip limit registers can be programmed with high and low limits for the conversion result, and an open-drain, out-ofrange indicator output ALERT becomes active when the programmed high or low limits are violated by the conversion result.
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A max Temperature range:? The parts operate from a single 2. The parts contain an 8-channel multiplexer and track-and-hold amplifier that can handle input frequencies up to 11 MHz. The conversion process can be controlled using the CONVST pin, by a command mode where conversions occur across I2C write operations or an automatic conversion interval mode selected through software control. This allows the widest dynamic input range to the ADC.
On-chip limit registers can be programmed with high and low limits for the conversion result, and an open-drain, out-ofrange indicator output ALERT becomes active when the programmed high or low limits are violated by the conversion result. This output can be used as an interrupt. I2C-compatible serial interface with pin-selectable addresses. The parts feature automatic shutdown while not converting to maximize power efficiency. Current consumption is 1? A max when in shutdown mode at 3V. Reference can be driven up to the power supply.
Out-of-range indicator that can be software disabled or enabled. One-shot and automatic conversion rates. Registers store minimum and maximum conversion results. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P. Box , Norwood, MA , U. Tel: All rights reserved. Table 1. A max k? A max 10 pF max Straight Natural Binary 2? Specifications outlined for Mode 2 apply to Mode 3 also.
Sample delay and bit trial delay enabled. Table 2. A max 10 pF max 0. All values measured with input filtering enabled. CB refers to capacitive load on the bus line. See Figure 2. Table 3. Table 4. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges.
Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Pin Function Descriptions Figure 3.
All analog input signals should be referred to this AGND voltage. The voltage range for the external reference is 1. F and 1? See Typical Connection Diagram. Single-ended analog input channel. Analog Input 3. Analog Input 5.
Analog Input 8. Analog Input 6. Analog Input 2. Logic Input. The device address depends on the voltage applied to this pin. Convert start signal.
This is an edge-triggered logic input. The rising edge of this signal powers up the part. The power-up time for the part is 1? A power-up time of at least 1? See the Limit Registers section. When configured as a BUSY output, this pin becomes active when a conversion is in progress. Open-drain output. Serial bus bidirectional data. External pull-up resistor required. Serial bus clock. Open-drain input. Table 6. The signal is the rms amplitude of the fundamental.
The ratio is dependent on the number of quantization levels in the digitization process; the more levels, the smaller the quantization noise. Typically, the value of this specification is determined by the largest harmonic in the spectrum, but for ADCs where the harmonics are buried in the noise floor, it is a noise peak. Intermodulation distortion terms are those for which neither m nor n equal zero. In this case, the second-order terms are usually distanced in frequency from the original sine waves while the third-order terms are usually at a frequency close to the input frequencies.
As a result, the second and third-order terms are specified separately. The calculation of intermodulation distortion is, like the THD specification, the ratio of the rms sum of the individual distortion products to the rms amplitude of the sum of the fundamentals, expressed in dB.
Channel-to-Channel Isolation A measure of the level of crosstalk between channels, taken by applying a full-scale sine wave signal to the unselected input channels, and determining how much the Hz signal is attenuated in the selected channel. The sine wave signal applied to the unselected channels is then varied from 1 kHz up to 2 MHz, each time determining how much the Hz signal in the selected channel is attenuated. This figure represents the worst-case level across all channels.
Aperture Jitter This is the sample-to-sample variation in the effective point in time at which the sample is taken. Full-Power Bandwidth The input frequency at which the amplitude of the reconstructed fundamental is reduced by 0. Integral Nonlinearity The maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The endpoints are zero scale, a point 1 LSB below the first code transition, and full scale, a point 1 LSB above the last code transition.
Offset Error Match The difference in offset error between any two channels. Gain Error Match The difference in gain error between any two channels. PSRR vs. AD Shutdown Current vs. AD Average Supply Current vs. The parts can be operated from a 2. This package offers considerable space-saving advantages over alternative solutions.
When supplies are first applied, the parts come up in a power-down state. Power-up is initiated prior to a conversion, and the device returns to shutdown when the conversion is complete. This automatic shutdown feature allows power saving between conversions. This means any read or write operation across the I2C interface can occur while the device is in shutdown.
Figure 18 and Figure 19 show simplified schematics of the ADC during the acquisition and conversion phase, respectively. Figure 18 shows the acquisition phase. SW2 is closed and SW1 is in position A, the comparator is held in a balanced condition, and the sampling capacitor acquires the signal on VIN. The input is disconnected once the conversion begins. The control logic and the capacitive DAC are used to add and subtract fixed amounts of charge from the sampling capacitor to bring the comparator back into a balanced condition.
When the comparator is rebalanced, the conversion is complete. The control logic generates the ADC output code. Figure 20 shows the ADC transfer characteristic.
AD7998 DATASHEET PDF
The model number is a specific version of a generic that can be purchased or sampled. Status Status indicates the current lifecycle of the product. This can be one of 4 stages: Pre-Release: The model has not been released to general production, but samples may be available. Production: The model is currently being produced, and generally available for purchase and sampling.
Zuluhn Pin Count is the number of pins, balls, or pads on the device. Indicates the packing option of the model Tube, Reel, Tray, etc. For low noise, high output current applications: Temperature Range This is the acceptable operating range of the device. Also, please note the warehouse location for the product ordered. International prices may vary due to local duties, taxes, fees and exchange rates.